In Partnership with AOL

  • Hydra Computer HDL - Hydra is an HDL based on the functional programming language Haskell.
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  • JHDL - JHDL is a method of describing (programmatically, in JAVA) the components and connections in a digital logic circuit.
    [!]
  • MyHDL - Python package for using Python as a hardware description and verification language.
    [!]
  • Perlilog - As the name implies, Perilog uses a mix of Perl and Verilog to construct parametric hardware designs.
    [!]
  • RHDL - RHDL (Ruby Hardware Description Language) is an HDL based on the Ruby programming language.
    [!]
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Last update: January 2, 2007 at 18:00:27 UTC - edit