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See also:
  • Digital Core Design - VHDL, Verilog synthesizable and simulation models.
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  • Doulos KnowHow - Designer's guides and models for VHDL and Verilog. SystemC home. Also Perl and Tcl/Tk for hardware designers resources.
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  • ForSyDe - The ForSyDe (Formal System Design) methodology has been developed with the objective to move system design to a higher level of abstraction and to bridge the abstraction gap by transformational design refinement.
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  • HDL at Wikipedia - Definitions, resources, and links related to hardware description languages.
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  • Ruby - Ruby is a notation and design discipline intended for the development of regular integrated circuits and similar hardware and software architectures.
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Last update: January 3, 2012 at 6:24:03 UTC - edit