This category contains sites that are relevant to high level verification languages and development environments: such as Specman, Vera, and SystemC. The category is mainly dedicated to sites that contain free information in the form of tutorials, scripts, and developer forums.
0-In Design Automation
This company provides functional verification products that help verify multi-million gate ASICs and SOC designs.
The company provides EDA solutions that enable electronic system designers to verify their algorithms in real hardware environments at an early design stage using C/C++/SystemC.
Provides a solution for verifying hardware and software in parallel.
InnoLogic Symbolic Simulation
ESP is an event driven Verilog symbolic simulator. ESP increases functional coverage and reduces verification runtime. ESP is ideal for memory and block level verification.
This company is the provider of a PC-based simulator.
Specman and SystemVerilog blog
A weblog for HVL (Specman - e and SystemVerilog) users, an extensive Specman tutorial and a verification methodology guide.
This is a group for specman users to ask questions, share code, techniques, and experience.
Provider of EDA and verification products.
Tau Simulation produces high performance simulation software for integrated circuit verification.
Teradyne provides application of systems technology to practical problems in the design, production, and servicing of electronics.
Provider of ready-to-use verification solutions for the SoC (system-on-a-chip), ASIC (application-specific integrated circuit) and FPGA (field-programmable gate array) markets.
VERA Group of Synopsys
Provides testbench automation solution for functional verification - The VERATM System Verifier.
To purchase the book "The Art of Verification with Vera" online.
Provides verification engineering and consulting services in Europe and Israel.
Last update:April 21, 2016 at 10:24:05 UTC