The PA-RISC (Precision Architecture Reduced Instruction Set Computing), a.k.a. HP/PA (Hewlett Packard Precision Architecture) was developed by Hewlett-Packard's Systems & VLSI Technology Operation in the late 1980s. Most versions have no Level 2 cache. Instead, large Level 1 caches are used, first as separate chips connected via bus, and now integrated on-chip.
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Last update:August 12, 2010 at 5:02:39 UTC